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LTC3210
OPERATION
4.6
4.4
4.2
4.0
V BAT = 3V
V CPO = 4.8V
C2 = C3 = C4 = 2.2μF
sources and charge pump until the die has cooled by
about 15°C. This thermal cycling will continue until the
fault has been corrected.
Mode Switching
3.8
3.6
3.4
3.2
–40
–15
10 35
TEMPERATURE (?C)
60
85
3210 F04
The LTC3210 will automatically switch from 1x mode
to 1.5x mode and subsequently to 2x mode whenever
a dropout condition is detected at an LED pin. Dropout
occurs when a current source voltage becomes too low
for the programmed current to be supplied. The time
from drop-out detection to mode switching is typically
0.4ms.
V RIPPLE ( P ? P ) =
I OUT
Figure4.Typical2xR OL vsTemperature
Thermal Protection
The LTC3210 has built-in overtemperature protection.
At internal die temperatures of around 150°C thermal
shutdown will occur. This will disable all of the current
APPLICATIONS INFORMATION
V BAT , CPO Capacitor Selection
The style and value of the capacitors used with the LTC3210
determine several important parameters such as regulator
control loop stability, output ripple, charge pump strength
and minimum start-up time.
To reduce noise and ripple, it is recommended that low
equivalent series resistance (ESR) ceramic capacitors are
used for both CV BAT and C CPO . Tantalum and aluminum
capacitors are not recommended due to high ESR.
The value of C CPO directly controls the amount of output
ripple for a given load current. Increasing the size of C CPO
will reduce output ripple at the expense of higher start-up
current. The peak-to-peak output ripple of the 1.5x mode
is approximately given by the expression:
(3)
( 3 f 0 SC ? C CPO )
Where f OSC is the LTC3210 oscillator frequency or typically
800kHz and C CPO is the output storage capacitor.
The part is reset back to 1x mode when the part is shut
down (ENM = ENC = Low) or on the falling edge of ENC.
An internal comparator will not allow the main switches to
connect V BAT and CPO in 1x mode until the voltage at the
CPO pin has decayed to less than or equal to the voltage
at the V BAT pin.
The output ripple in 2x mode is very small due to the fact
that load current is supplied on both cycles of the clock.
Both style and value of the output capacitor can significantly
affect the stability of the LTC3210. As shown in the Block
Diagram, the LTC3210 uses a control loop to adjust the
strength of the charge pump to match the required output
current. The error signal of the loop is stored directly on the
output capacitor. The output capacitor also serves as the
dominant pole for the control loop. To prevent ringing or
instability, it is important for the output capacitor to maintain
at least 1.3μF of capacitance over all conditions.
In addition, excessive output capacitor ESR >100m Ω will
tend to degrade the loop stability. Multilayer ceramic chip
capacitors typically have exceptional ESR performance and
when combined with a tight board layout will result in very
good stability. As the value of C CPO controls the amount of
output ripple, the value of CV BAT controls the amount of
ripple present at the input pin(V BAT ). The LTC3210’s input
current will be relatively constant while the charge pump is
either in the input charging phase or the output charging
3210fb
  
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